1. Field of the Invention
Example embodiments of the present invention relate generally to a semiconductor device and methods thereof, and more particularly to a semiconductor device and a method of manufacturing the semiconductor device and also a method of forming a highly oriented silicon film.
2. Description of the Related Art
Three-dimensional semiconductor devices may have the potential of increasing a density, or number of layers, of transistors or memory layers in conventional semiconductor devices. FIG. 1 is a cross-sectional view of a conventional three-dimensional semiconductor device 10. Referring to FIG. 1, the three-dimensional semiconductor device 10 may have a structure in which insulating layers 12, 14, and 16 and silicon film layers 13 and 15 may be alternately stacked on a silicon substrate 11. A plurality of thin film transistors TR (e.g., CMOS transistors, transistors associated with memory storage, etc.) may be formed on upper surfaces of the silicon substrate 11 and the silicon film layers 13 and 15. The silicon layers 11, 13, and 15 may be electrically connected to each other through conductive plugs 17.
Referring to FIG. 1, the three-dimensional semiconductor device 10 may be manufactured by stacking the silicon film layers 13 and 15 on the insulating layers 12 and 14 may thereby be configured to have higher charge mobility. Accordingly, the silicon film layers 13 and 15 may be manufactured to be highly oriented silicon films (e.g., approximating single crystals). However, conventional processes may not be capable of epitaxially growing highly oriented silicon film on an insulating layer.
Conventionally, in order to manufacture a silicon film having higher charge mobility on an insulating layer, the silicon film may be recrystallized to approximate a single crystal silicon via a laser annealing process performed after forming amorphous silicon or polycrystalline silicon on the insulating layers 12 and 14, growing the silicon film toward lateral directions from the conductive plugs 17, or alternatively bonding an individually grown single crystal silicon film to the insulating layers 12 and 14. However, each of the above-described conventional processes for attempting to approximate single crystal-type silicon films may be performed relatively high temperatures, may consume a relatively long period of time to perform and thereby may be associated with higher manufacturing or fabrication costs. Furthermore, a resultant orientation may not be controlled precisely, and grain boundaries may be generated in a resultant product.
FIG. 2 is a cross-sectional view illustrating a conventional structure used to form a highly oriented silicon film. In particular, FIG. 2 illustrates a structure including a growing silicon layer oriented in a <100> direction (e.g., a direction coinciding with a miller index direction of <100> with respect to a crystallographic plane) on a γ(gamma)-Al2O3 layer. If an Al2O3 layer 22 is formed on a silicon substrate 21 oriented in the <100> direction, the Al2O3 layer 22 may become a γ-Al2O3 oriented in the <100> direction. If a silicon layer 23 is further epitaxially grown on the γ-Al2O3 layer 22, the silicon layer 23 may be oriented in the <100> direction. As depicted in FIG. 2, the γ-Al2O3 layers 22 and 24 and (100)-silicon layers 23 and 25 may be repeatedly stacked. The “stacking” of layers in the structure of FIG. 2 may be facilitated by the lattice mismatch between a γ-Al2O3 crystal and a (100)-silicon crystal, which may typically be maintained between 2.4 to 3.5%. However, the above-described conventional process may have difficulty controlling an orientation of the silicon substrate 21.
The conventional stacking structure shown in FIG. 2 may employed to fabricate a semiconductor device. In the conventional stacking structure of FIG. 2, as discussed above, the Al2O3 layer 22 may only be highly oriented if formed on another highly oriented layer (e.g., a silicon layer). Thus, if the Al2O3 layer 22 were to be formed on, for example, an insulating layer, the resultant Al2O3 layer 22 may not be highly oriented. Accordingly, the conventional stacking structure of FIG. 2 may typically not be deployed during a fabrication of semiconductor devices.